Exploiting Parallelism in DSP and Multimedia
Applications using SIMD, VLIW and Superscalar Architectures
Mr. Deepu Talla
Doctoral Candidate
Department of Electrical and Computer Engineering
Friday, November 19th, 2:00 PM, ENS 302
deepu@ece.utexas.edu
Abstract
DSP and multimedia applications are becoming increasingly
important for computer systems as a dominant computing workload.
This talk will present the performance of very long instruction word
(VLIW), single-instruction multiple-data (SIMD), and superscalar
techniques using one modern commodity processor for each
microarchitecture. Compiler intrinsics are used to obtain better
performance than when using ANSI C code. Sensitivity experiments on
instruction level parallelism are discussed using the Simplescalar toolsuite
and Tetra.
Biography
Deepu Talla is a PhD student in Computer Engineering under Prof.
Lizy K John. His interests are in computer architecture, specifically for
multimedia and signal processing, benchmarking and performance evaluation,
and ASIC design. He is currently on leave from Texas Instruments, where he
works in the DSP R&D division.
A list of Telecommunications and Signal Processing Seminars is available at
from the ECE department Web pages under "Seminars".
The Web address for the Telecommunications and Signal Processing Seminars is
http://anchovy.ece.utexas.edu/seminars