Signal and Image Processing Seminar

Fundamentals of ADSL Transceivers

Dr. Sayfe Kiaei, Manager
xDSL Technology Advanced Development
Broadband Division
Motorola, Austin, TX 78721

Monday, November 16, 5:00 - 6:30 PM, ENS 302

esk013@email.sps.mot.com

Abstract

Asymmetric Digital Subscriber Loop (ADSL) technology allows high-speed data access. The downlink data rates vary according to the quality of the line from 1 to 9 Mbits per second. The uplink data rate is 640 kbits per second. ADSL lines have been available from Southwestern Bell since the Fall of 1997, but ADSL modems will not be commercially available for home users until the Fall of 1999. The next step is the proliferation of this technology is to install ADSL modems in the Central Offices of telecomnuications companies. In March of 1998, Motorola introduced a single chip solution for ADSL modems, called CopperGold. It was the first single-chip solution, and features relatively low power consumption, which is ideal for use in Central Office ADSL modems.

This talk will cover the fundementals of Asymmetric Digital Subsriber Loop (ADSL) modems and focus on the design and implementation of the digital subsystems. ADSL is based on discrete-multitone modulation in which multiple digital QAM signals are combined via an inverse Fourier transform and transmitted as a single signal over an ADSL lines. The inverse Fourier transform implements discrete multitone modulation. This talk will present an overview of the discrete multitone modulation and the building blocks of ADSL modems. This talk will also discuss the role of programmable digital signal processor cores in development of a single-chip solution.

Biography

Sayfe Kaiei received his Ph.D.E.E. from Washington State University in 1987. Dr. Kiaei was with Boeing Research and Technology Center from 1985-1986 and with Motorola Inc. Wireless Technology Center and Broadband Products Division from 1993 to present. Before that, he was a tenured associate professor with the Department of Electrical Engineering at Oregon State University from 1987-1993, 1995-1997 and the associate director of the NSF Center for the Design of Mixed-mode Analog/Digital ICs (CDADIC) from 1988-1997. He is an adjunct faculty at The University of Texas from 1998-present. His current research activities includes design of high-performance mixed-signal ICs, Systems and circuits for communication applications, and DSP. He has authored several book chapters and over 50 journal/conference papers in the fields of Wireless Communications, DSP, and Mixed-Signal CMOS IC's. Dr.Kiaei is a Senior Member of the IEEE, and was an Associate Editor of the IEEE Transactions on Circuits and Systems from 1993-1996, Editor of IEEE Micro-Wave Transactions on RFIC Design Dec 1998, and the Editor of IEEE Communication Magazine on circuits and systems for wireline systems April 1999. He is the General Chair of the International Symposium on Low-Power Electronics, RFIC symposium steering committee member and publicity chair, and Member of the Technical Program Committee of a number of conferences. Dr. Kiaei is the recipient of the IEEE Circuits and Systems Society Darling best paper award in 1994, and the recipient of the loyd-carter award for the the best teacher in the college of engineering at Oregon State University in 1992.

A list of digital signal processing seminars is available at from the ECE department Web pages under "Seminars". The Web address for the digital signal processing seminars is http://anchovy.ece.utexas.edu/seminars