802.11 WLAN Transceiver Systems: Theory and Design Challenges

Dr. Brian Kelley

Wireless Integration Technology Center-WBSG,
Motorola, Inc.
7700 West Parmer Lane, Austin, TX 78729

Wednesday, April 10th, 5:00 PM, ENS 127

Abstract

Wireless Local Area Networks (WLANs) are gaining increasing popularity due to low cost, their ability to operate in inexpensive, unlicensed frequency spectrum, extremely high wireless data rates of up to 54Mbs, and formalized integration capability with wired LANs. In addition to their use in connecting PCs and PDAs to wireless Ethernet networks, future ubiquitous deployment of 802.11 WLANs is expected to allow for hot-spot coverage for next generation 3G and 4G cellular networks. Traditional 802.11b utilizes the [2.4-2.4835] GHz unlicensed RF band, while the newer 802.11a standard utilizes the [5.15-5.35] and [5.725-5.825] GHz RF band. In addition, 802.11b and 802.11a utilize multiple combinations of physical layer frame types and modulation methods, including direct sequence spread spectrum modulation (DSSS), complementary code keying (CCK), packet binary convolutional codes (PBCC), Orthogonal Frequency Division Multiplexing (OFDM-QAM) modulation. Moreover, there are a plethora (a,b,c,e,f,i,h,g) of amended standards associated with 802.11 and considerable network security concerns, each of which creates specific system design issues.

In this presentation we give an overview of the 802.11 protocol, with an emphasis on the physical layer and physical layer convergence protocols. In addition, we will discuss key theoretical digital communication and signal processing concepts, algorithms, and IC design methods associated with the rapid prototyping of 802.11 transceiver systems.

Biography

Brian Kelley received his BSEE at Cornell University. While at Cornell he was inducted into Tau Beta Pi and Eta Kappa Nu honor societies. He matriculated to the DSP group at the Georgia Institute of Technology where he was a Georgia Tech Presidential Fellow and Office of Naval Research Fellow. While at Georgia Tech, his major areas of focus were DSP, Communications, VLSI, and Computer Engineering. He received his MSEE and PhDEE at the Georgia Institute of Technology DSP group in 1993. In 1993 he joined Motorola Inc. where he researched IEEE IS54 VSELP based DSP co-processors. In 1994, he joined the Paging Division's wireless IC communication organization, where he was DSP System Architect of the first fully Digital, ultra-low power two-way paging receiver IC. In 1998, he joined Motorola's Personal Communication Sector's Wireless Integration Technology Center (WITC), where he is currently a Manager and Principal Staff Engineer. Dr. Kelley was technical project leader of a cross-corporate effort to develop a Software Definable Radio (SDR) wireless modem System on a Chip (SoC) supporting all of the next generation of 3G wireless communication protocols and is currently manager, project leader, and modem system architect of the IEEE 802.11 WLAN Chipset Project effort at Motorola. Dr Kelley has taught graduate level classes on VLSI Systems in Digital Communications at Florida Atlantic University in 1997 and has taught the graduate level Advanced Signal Processing course in September of 2000 at UT-Austin. Dr. Kelley has 11 U.S. patents that have either issued or are pending.

A list of Telecommunications and Signal Processing Seminars is available at from the ECE department Web pages under "Seminars". The Web address for the Telecommunications and Signal Processing Seminars is http://signal.ece.utexas.edu/seminars